๐๐ Proud Moment for CBIT! ๐๐
*A chip designed by CBIT under MeitYโs C2S Programme was part of the Collage of Chips gifted by Honโble Union Minister Shri Ashwini Vaishnaw to Honโble Prime Minister Shri Narendra Modi at Semicon India 2025*
Chaitanya Bharathi Institute of Technology (CBIT) Contributes to India’s Semiconductor Mission HYDERABAD โ Chaitanya Bharathi Institute of Technology (CBIT) proudly announces its significant contribution to India’s first indigenous semiconductor chip initiative. As a premier engineering and research institution, CBIT was chosen by the Ministry of Electronics and Information Technology (MeitY) to lend its expertise in VLSI design and advanced chip development, placing the institute at the forefront of the nation’s semiconductor mission.
A chip fabricated by CBIT was included in a “collage of chips” presented to Prime Minister Shri Narendra Modi by Union Minister Shri Ashwini Vaishnaw at Semicon India 2025 on September 2, 2025, in New Delhi. This showcase highlights CBIT’s role in advancing India’s self-reliance in semiconductor design and manufacturing. The project, titled B was funded by the MeitY’s Chips to Startup (C2S) program and implemented in collaboration with Osmania University.
Sri N. Subash CBIT President appreciated the team for their successful All-Digital Phase-Locked Loop (ADPLL) chip design under the MeitY C2S program. He expressed that the institute will provide continued research opportunities and support to build upon this achievement and pursue further advancements in research and innovation work.
The Principal of CBIT, Prof. C.V. Narasimhulu, congratulated the team behind the All-Digital Phase-Locked Loop (ADPLL) chip for its successful design and fabrication under the Chips to Startup (C2S) program. He called it a proud moment for the institution and a significant step toward the Atmanirbhar Bharat vision.
The team included:
*Dr. Mohd. Ziauddin Jahangir – Project Chief Investigator
*Dr. D. Krishna Reddy – Co Chief Investigator
ย *Dr . M.Ramana Reddy – Resource Person
*Dr. M. Bhanuchander – Resource Person
*Ms. P. Charishma – Project Associate
*Smt. P. Shirisha – Project Associate
*Sri. M. Krishna – Technical Staff In-charge
This milestone demonstrates that CBIT is operating at the same level as premier institutions like the IITs in research and industry collaboration. The institute has recently introduced a dedicated VLSI course into its undergraduate curriculum, ensuring students are equipped with industry-relevant skills. This accomplishment was made possible with the unwavering support of management, including Dr. A.D. Sarma, Advisor of R&D, and Dr. K. Vasanth, Head of ECE.
Congratulations! to Dr. Jahangir & Team Members for designing “ALL DIGITAL PLL” (Chip fabricated by CBIT is part of Momento presented to PM Shri. Narender Modi)
The chips fabricated under C2S Programme was gifted by Hon’ble Minister to the Prime Minister during Semicon India 2025 on 02nd September 2025